The existing matrix thin film for thin-film transistors consists of a quartz substrate and polycrystalline silicon of relatively large grain size (500-600 nm) formed on the substrate by heat treatment at the temperature of 900° C. or so (hereinafter referred to as “high-temperature polycrystalline silicon”). Using well-crystallized polycrystalline silicon of low grain-boundary density as their channels, thin-film transistors formed on a thin film of high-temperature polycrystalline silicon have electron mobility of 200-350 cm2/Vs, which is close to the electron mobility of thin-film transistors formed on singlecrystalline silicon (up to 500 cm2/Vs, S. M. Sze, Physics of Semiconductor Devices, p. 29, Second Edition, Wiley). However, the thin film of high-temperature polycrystalline silicon has to be formed on a quartz substrate which can withstand heat treatment at high temperature but is expensive, the production cost of thin-film transistors formed on the thin film is relatively high, which limits the market size of the transistors.
Many researchers have recently been conducted to establish a method for forming polycrystalline silicon on a substrate through low-temperature heat treatment (hereinafter referred to as “low-temperature polycrystalline silicon”). According to the method, a thin film of amorphous silicon is formed on an inexpensive substrate of glass or plastic by plasma CVD (chemical vapor deposition) or the like and the amorphous silicon is annealed into polycrystalline silicon with an excimer laser. This method enables forming the thin film of polycrystalline silicon at low temperature (up to 150° C.) thereby producing thin-film transistors at low cost. Compared with high-temperature polycrystalline silicon, however, the grain size of low-temperature polycrystalline silicon is smaller. Besides, the face orientations of crystal grains of low-temperature polycrystalline silicon are at random. If the size of crystal grains of polycrystalline silicon is small, the grain-boundary density in carrier channels is high. If the face orientations of crystal grains of polycrystalline silicon are at random, the trap-level density at grain boundaries is relatively high. In either case, the characteristic of transistors is affected. Accordingly, the electron mobility of thin-film transistors formed on substrates of low-temperature polycrystalline silicon is limited to 150 cm2/Vs or so, resulting in the low operating speed of elements thereby limiting the number of kinds of elements formable on a single glass-based (or plastic-based) substrate. For example, pixels of an image display can be formed on the glass-based (or plastic-based) substrate, but other circuit elements, such as source drivers, gate drivers, shift registers, and peripheral control units, have to be formed on a conventional printed circuit board to be connected to the substrate with wires. It results in a smaller image-displaying unit but high manufacturing cost.
A technology to increase the size of crystal grains and to uniform the positions and face orientations of crystal grains is in demand. Various techniques have been proposed to increase the grain size and to regulate the positions and face orientations of crystal grains of low-temperature polycrystalline silicon. JP-A-345783/1999 discloses a technique of scanning silicon with a laser beam twice or more at 5-90°; JP-A-249592/1995 discloses a technique of turning a laser beam by (n/2+¼) to scan silicon with twice or more. JP-A-199808/1998 discloses a technique of scanning silicon with a laser beam twice or more at 90°. These techniques apply heat energy to silicon crystals repeatedly so as to anneal them for high quality. On the other hand, the present invention is to crystallize silicon by scanning silicon with laser beams devised based on the structure and growth mechanism of silicon crystals. In addition to the above prior art references, JP-A-321339/1995 discloses a technique of forming polycrystalline silicon with {111} axes in the carrier-moving direction by introducing into a thin film of amorphous silicon on an insulating substrate with metallic elements which foster crystallization selectively and cause crystals to grow in parallel with the insulating substrate. JP-A-41234/1998 discloses a technique of forming rectangular polycrystalline silicon with {100} axes in a direction perpendicular to the insulating substrate and {220} faces in parallel (or at an angle of 45°) with the direction of scanning by controlling each minute the shape of a beam for heat treatment and moving the beam from spot to spot. JP-A-55808/1996 discloses a technique of forming a column-like polycrystalline-silicon layer of uniform face orientations by (i) forming a first polycrystalline-silicon layer to form seed crystals with one of the specific faces ({100}, {110}, and {111}) via anisotropic etching and (ii) forming a second polycrystalline-silicon layer on the first layer. All the above prior art references, however, fail to produce transistors of adequately high electron mobility.
The above prior art references produce crystals of insufficient grain size (up to 2 μm), whereas thin-film transistors for large-screened liquid crystal displays require practical grain size of about 8 μm. Besides, the prior art fails to form crystal grains in exact positions to provide elements of uniform performance. Thus, the prior art can not provide high-performance TFT devices to replace conventional low-performance TFT devices with desired characteristics. The prior art fails to seek a method of crystallization on the basis of the growth mechanism of silicon crystals. To solve such problems, it is essential to develop a technique which is most consistent with the self-organizing function of silicon crystals.
The object of the present invention is to uniform face orientations of the crystal grains and to increase the size of the crystal grains (to form pseudo-single crystals) of low-temperature polycrystalline silicon for making thin-film transistors by a method of crystallization based upon the growth mechanism of silicon crystals so as to realize a high-electron-mobility TFT device and provide a large-screened image display of low manufacturing cost.